Aldec Active-HDL 10.1 (64bit) (03/02/15)

Aldec Active-HDL 10.1 (64bit) (03/02/15)

Aldec Active-HDL 10.1 (64bit) | 478.7 mb

Aldec, Inc., announces the latest release of its mixed-language FPGA design platform, Active-HDL 10.1. Popular with designers for more than 15 years for FPGA design entry and simulation due to its award-winning and intuitive GUI and high performance simulator, Active-HDL now offers support for 64-bit simulation to meet the growing demand of simulation of larger designs.


Active-HDL is an HDL-based FPGA Design and Simulation solution that supports the newest FPGA devices available from all leading FPGA vendors. The high-performance, mixed-language solution interfaces with nearly one hundred twenty (120) third party vendor tools and provides FPGA designers a single platform that can be used independently of the targeted FPGA design flow. Active-HDL 10.1 supports design creation and simulation of the newest industry-leading FPGA devices from Altera, Lattice, Microsemi (Actel), Quicklogic and Xilinx.

More info: [Ссылки доступны только зарегистрированным пользователям . Регистрируйся тут...]

About Aldec

Established in 1984, Aldec is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions.

DOWNLOAD LINKS:

http://rapidgator.net/file/fca59d5cf671d97eea6838ce0383a663/dAcH10164b.rar.html

http://uploaded.net/file/s496pqep/dAcH10164b.rar

http://www.nitroflare.com/view/AB379A92F1616BB/dAcH10164b.rar

http://www.uploadable.ch/file/BfPQhHE3UfNA/dAcH10164b.rar